In this section we describe some details of how the Verilog interface works.
In this topic:
SIMetrix communicates with the Verilog simulator using the Verilog Procedural Interface or VPI. VPI allows an external program to communicate with a Verilog simulator.
The diagram below shows the program structure.
vsxd.vpi is a DLL/shared library that is provided as part of SIMetrix. This is loaded by the external Verilog simulator and runs in the Verilog process's memory space. vsxd.vpi uses the VPI interface to send events to the Verilog simulator, to respond to events generated by the Verilog simulator and to interrogate the Verilog simulator about details of the user's Verilog module.
vsxd.vpi is able to respond to events during the Verilog simulation that cause a change on an output port and send those changes to the SIMetrix simulator.
Conversely the SIMetrix simulator detects when there are changes on an input port and notifies vsxd.vpi which then notifies the Verilog simulator.
vsxd.vpi is also able to enumerate the ports and parameters of a Verilog module and report this information back to SIMetrix. This process is performed before a simulation starts in order to build the final Verilog top level design.
In order for the interface to be setup, SIMetrix needs to know how to drive the Verilog simulator. Also the Verilog simulator needs to know about vsxd.vpi.
The interface is configured by the VerilogHDL.ini file which is located in the support folder. VerilogHDL.ini uses the standard inifile format. Each supported simulator is defined in a section within VerilgHDL.ini and the section must at a minimum define the following keys 'Name', 'Script' and 'Path'. 'Name' defines a display name for the simulator that will be meaningful to the user. 'Script' defines a script name that is used to launch the Verilog simulator. (More on the launch script below). 'Path' is passed to the launch script and would usually be the path where the main binary executable for the Verilog simulator is located.
The launch script is a SIMetrix script that is called by SIMetrix. It is responsible for starting the Verilog process usually via the 'Shell' function. The launch script knows about the command line syntax for the Verilog simulator.
For more details about the launch script, see the script used to launch the GPL cver simulator.
SIMetrix netlists can instantiate any number of verilog designs, both multiple instances of the same Verilog module and multiple module designs. In order for the Verilog simulator to be able to handle these multiple instances, it needs to be presented with a top level module that defines the interconnections between them. This top level module is generated automatically by SIMetrix on each simulation run and is called (by default) vsx_root.v.
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