MOSFET Switching Losses - A Deep Dive - Part II


Previously Held on Thu, November 29th, 2018

This webinar continues exploring switching losses using the SIMPLIS simulator, and is the second part of a series of webinars on switching losses. A recording of the first part of this series can be found at MOSFET Switching Losses - A Deep Dive - Part I.

We will start the webinar by summarizing the conclusions from the first webinar in this series. In the first webinar, we created customized MOSFET models starting with the model created by the built-in parameter extraction routine. The Drain-to-Gate capacitance was then extended to be non-linear in the region where the Drain-to-Gate voltage is negative. The resulting SIMPLIS model has a Drain-to-Gate capacitor with seven PWL segments, four in the positive voltage region, and two in the negative voltage region. This SIMPLIS model matches the switching loss to within 2% of the loss predicted by the SPICE model.

In this webinar, we will take the customized MOSFET models created in the first webinar and insert these models into a real application circuit. A hard-switched synchronous buck converter will be used as the test vehicle.

At the end of the webinar, we will start a preliminary discussion of reverse recovery losses. Reverse recovery is a very complex subject and will be covered in a future webinar.

Link to Webinar Recording

The webinar recording can be viewed at this link: MOSFET Switching Losses - A Deep Dive - Part II (58:14)

Reference Materials

Schematics and presentation slides for the webinar can be downloaded here: