# Debugging a Slow Simulation

### Date

Previously Held on June 29th, 2017

This one hour webinar focuses on identifying the circuit elements which cause a SIMPLIS simulation to run slowly. The webinar will begin with a description of circuit elements which cause SIMPLIS to run slowly. Example circuits with small RC and L/R time constants will be presented and examined, with the simulation speed correlated to the smallest time constant.

The main portion of the webinar will focus on using the SIMPLIS Debug Report Generator to identify the root cause of the slow simulation.

The webinar recording can be viewed at this link: Debugging a Slow Simulation (57:04)

The supplementary presentation on the Debug Report Generator can be viewed at this link: Debug Report Generator (24:26)

## Abstract

### Part I: What causes SIMPLIS simulations to slow down?

• Number of Inductors and Capacitors
• Number of PWL topologies
• Simulation step size (smallest time constant) for each PWL topology
• RC time constants
• L/R time constants

### Part II: How do you debug and fix a slow simulation?

• Prevention is ALWAYS the best cure
• Reduce # of Inductors and Capacitors
• Reduce # of PWL topologies
• Plotting minimum time constants
• RC time constants -- Solution: realistic Resistor values
• L/R time constants -- Solution: shunt Resistor
• Debug slow simulations with Debug Report

## Reference Materials

Schematics and presentation slides for the webinar can be downloaded here: jun_2017_debugging_a_slow_simulation.zip

Q1: I can think of one example where the parasitics of the buck converter might affect the simulation results : at the boundary of CCM , when the inductor current barely reaches zero, the small signal bode plot changes because of the extra delay in the commutation caused by the resonance ( if the switching frequency is high enough compared to the resonance.) Can SIMPLIS predict that?

A1: Yes, SIMPLIS can do a very good job of modeling the behavior of systems that hover around a critical conduction mode operating point. Because SIMPLIS models the time-domain behavior of the circuit and then converts that into a frequency domain representation, SIMPLIS has no problem as circuits move from Continuous ConductMode into Discontinuous Conduction Mode. Even AC analysis of critical conduction mode circuits work fine in SIMPLIS. I have included two versions of our critical conduction mode self-oscillating flyback converter as one illustration.

Q8.1.Flyback.sxsch models the switching transitions of this converter using a Model Level = 2 for the MOSFET Q1 and a 2-Sebment PWL resistor in parallel with the nonlinear junction capacitance of the diode D5.

Q8.2.Flyback.sxsch does not model the switching transitions and uses a Model Level =0 for the MOSFET Q1 and a 2-Sebment PWL resistor in parallel with zero junction capacitance for the diode D5.

They are both set up to run a POP analysis and an AC analysis. By overlaying the waveforms you can see that there is certainly a difference and there is a slight additional delay between the turn off of the diode and the turn-on of the switch. But it is pretty small in this case. It also makes very little difference in the Bode Plot of the Loop Gain and Phase. So, for this circuit, you can conclude that it is not necessary to include the switch transitions in your MOSFET model when your simulation objective is an AC analysis or as step load transient.

Of course, I would always recommend that you do a similar experiment for each new circuit/control scheme combination, so that you will have full confidence in your assumptions. But in my experience, for reasonably efficient systems, modeling the switching transitions is very rarely essential when your simulation objective is focused on the closed-loop behavior of the system.