Test Details | |
Schematic | 6.3_LTC3406B - DVM ADVANCED.sxsch |
Test | Post-Process 1 Spec |
Date / Time | 12/10/2015 5:57 PM |
Report Directory | scripting\Post-Process1 Spec |
Log File | report.txt |
Screenshot | schematic.png |
Status | PASS |
Simulator | simplis |
Deck | input.deck |
Init | input.deck.init |
Measured Scalar Values | |
Frequency(CLK) | 955.688k |
gain_crossover_freq | 18.3383k |
gain_margin | 33.7095 |
ILOAD | AVG 603.439m MIN 600.632m MAX 605.224m RMS 603.441m PK2PK 4.59272m |
ISRC | AVG 101.745m MIN 465.682u MAX 831.192m RMS 254.453m PK2PK 830.727m |
min_phase | 54.3004 |
min_phase_freq | 18.3383k |
phase_crossover_freq | 346.054k |
phase_margin | 54.2129 |
VLOAD | AVG 605.449m MIN 602.632m MAX 607.24m RMS 605.451m PK2PK 4.608m |
VSRC | AVG 5.4999 MIN 5.49917 MAX 5.5 RMS 5.4999 PK2PK 830.727u |
Measured Spec Values | |
is_value_pi | PASS: 3.1415927 is pi |
LOAD
VLOAD
ILOAD
|
|
SXGPH File | simplis_pop4_145.sxgph |
Bode Plot
GAIN
PHASE
|
|
SXGPH File | simplis_ac4_162.sxgph |
SRC
VSRC
ISRC
|
|
SXGPH File | simplis_pop4_135.sxgph |
default
CLK
ILOUT
SW
VOUT
|
|
SXGPH File | simplis_pop4_140.sxgph |
Other SXGPH Files | |
clock#pop | simplis_pop4_127.sxgph |