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» DVM Test Report: Steady-State|Steady-State|Vin Nominal|Light Load

Test Details
Schematic 4.2_LTC3406B - DVM ADVANCED.sxsch
Test Steady-State|Steady-State|Vin Nominal|Light Load
Date / Time 12/10/2015 5:43 PM
Report Directory run_blt_in_and_prmt_grphs\Steady-State\Steady-State\VinNominal\Light Load
Log File report.txt
Screenshot schematic.png
Status PASS
Simulator simplis
Deck input.deck
Init input.deck.init
Measured Scalar Values
Efficiency 91.7485%
Efficiency_nom 91.7485%
Frequency(CLK) 955.703k
ILOAD
AVG
50.0255m
MIN
49.9695m
MAX
50.0749m
RMS
50.0255m
PK2PK
105.365u
ISRC
AVG
16.4199m
MIN
313.482u
MAX
500.173m
RMS
49.5187m
PK2PK
499.859m
Power(LOAD) 75.3227m
Power(SRC) 82.097m
VLOAD
AVG
1.50569
MIN
1.504
MAX
1.50717
RMS
1.50569
PK2PK
3.17121m
VSRC
AVG
4.99998
MIN
4.9995
MAX
5
RMS
4.99998
PK2PK
499.859u
Measured Spec Values
Max_VLOAD PASS: Max. Output1 Voltage (1.50717) is less than or equal to Max. Output1 Voltage Spec (1.58025)
Min_VLOAD PASS: Min. Output1 Voltage (1.504) is greater than or equal to Min. Output1 Voltage Spec (1.42975)
LOAD
VLOAD
ILOAD
SXGPH File simplis_pop1_19.sxgph
SRC
VSRC
ISRC
SXGPH File simplis_pop1_9.sxgph
default
CLK
ILOUT
SW
VOUT
SXGPH File simplis_pop1_14.sxgph
Other SXGPH Files
clock#pop simplis_pop1_1.sxgph